Basic Information

Faculty

• 工学部

Academic Degree

• 修士（情報学）(京都大学)
• 博士（情報学）(京都大学)

Research History

• From Sep. 2020, To Present

  Kyoto University, Graduate School of Informatics, 准教授
• From Jan. 2019, To Aug. 2020

  Osaka University, Graduate School of Information Science and Technology, 准教授
• From Jan. 2017, To Dec. 2018

  The University of Tokyo, VLSI (Very Scale Integration Large) Design and Education Center
• From Apr. 2016, To Dec. 2016

  日立製作所研究開発グループ

ID,URL

• J-Global ID

  201801000165225005

researchmap URL

• https://researchmap.jp/hiromitsu_awano

Research

Research Areas

• Informatics, Computer systems

Papers

• A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits

  Dehua Liang; Hiromitsu Awano; Noriyuki Miura; Jun Shiomi

  ACM Transactions on Embedded Computing Systems, 11 Sep. 2023

  
• Uncertainty-aware Haptic Shared Control with Humanoid Robots for Flexible Object Manipulation

  Takumi Hara; Takashi Sato; Tetsuya Ogata; Hiromitsu Awano

  IEEE Robotics and Automation Letters, 2023

  
• DependableHD: A Hyperdimensional Learning Framework for Edge-Oriented Voltage-Scaled Circuits.

  Dehua Liang; Hiromitsu Awano; Noriyuki Miura; Jun Shiomi

  ASP-DAC, 2023

  
• Pay Attention via Binarization: Enhancing Explainability of Neural Networks via Binarization of Activation.

  Yuma Tashiro; Hiromitsu Awano

  ISCAS, 2022

  
• Respiratory Rate Estimation Based on WiFi Frame Capture.

  Takamochi Kanda; Takashi Sato; Hiromitsu Awano; Sota Kondo; Koji Yamamoto 0001

  19th IEEE Annual Consumer Communications & Networking Conference(CCNC), 2022

  
• Temporal Ensemble SSDLite: Exploiting Temporal Correlation in Video for Accurate Object Detection.

  Lukas Nakamura; Hiromitsu Awano

  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022

  
• Binary Neural Network in Robotic Manipulation: Flexible Object Manipulation for Humanoid Robot Using Partially Binarized Auto-Encoder on FPGA.

  Satoshi Ohara; Tetsuya Ogata; Hiromitsu Awano

  IEEE/RSJ International Conference on Intelligent Robots and Systems(IROS), 2021

  
• BYNQNet: Bayesian Neural Network with Quadratic Activations for Sampling-Free Uncertainty Estimation on FPGA.

  Hiromitsu Awano; Masanori Hashimoto

  2020 Design(DATE), 2020

  
• 33us, 94uJ Optimal Ate Pairing Engine on BN Curve over 254b Prime Field in 65nm CMOS FDSOI.

  Makoto Ikeda; Tadayuki Ichihashi; Hiromitsu Awano

  IEEE Asian Solid-State Circuits Conference(A-SSCC), 2019

  
• BayesianPUFNet: Training Sample Efficient Modeling Attack for Physically Unclonable Functions.

  Hiromitsu Awano; Makoto Ikeda

  IEICE Trans. Fundam. Electron. Commun. Comput. Sci., May 2023

  
• Pay Attention via Quantization: Enhancing Explainability of Neural Networks via Quantized Activation.

  Yuma Tashiro; Hiromitsu Awano

  IEEE Access, 2023

  
• B2N2: Resource efficient Bayesian neural network accelerator using Bernoulli sampler on FPGA

  Hiromitsu Awano; Masanori Hashimoto

  Integration, the VLSI journal, Nov. 2022, Peer-reviewed

  
• BloomCA: A Memory Efficient Reservoir Computing Hardware Implementation Using Cellular Automata and Ensemble Bloom Filter

  Dehua Liang; Masanori Hashimoto; Hiromitsu Awano

  2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 01 Feb. 2021, Peer-reviewed

  
• Hardware-friendly delayed feedback reservoir for multivariate time series classification

  Sosei Ikeda; Hiromitsu Awano; Takashi Sato

  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Aug. 2022, Peer-reviewed

  
• DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification

  Dehua Liang; Jun Shiomi; Noriyuki Miura; Hiromitsu Awano

  Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2022

  
• A Hardware Efficient Reservoir Computing System Using Cellular Automata and Ensemble Bloom Filter

  Dehua LIANG; Jun SHIOMI; Noriyuki MIURA; Masanori HASHIMOTO; Hiromitsu AWANO

  IEICE Transactions on Information and Systems, 01 Jul. 2022

  
• Visualization of a chorus structure in multiple frog species by a sound discrimination device.

  Hiromitsu Awano; Masahiro Shirasaka; Takeshi Mizumoto; Hiroshi G Okuno; Ikkyu Aihara

  Journal of comparative physiology. A, Neuroethology, sensory, neural, and behavioral physiology, Jan. 2021

  
• Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping.

  Yasuhiro Ogasahara; Yohei Hori; Toshihiro Katashita; Tomoki Iizuka; Hiromitsu Awano; Makoto Ikeda; Hanpei Koike

  Integr., 2020, Peer-reviewed

  
• PUFNet: A Deep Neural Network Based Modeling Attack for Physically Unclonable Function.

  Hiromitsu Awano; Tomoki Iizuka; Makoto Ikeda

  IEEE International Symposium on Circuits and Systems(ISCAS), 2019, Peer-reviewed

  
• Fourℚ on ASIC: Breaking Speed Records for Elliptic Curve Scalar Multiplication.

  Hiromitsu Awano; Makoto Ikeda

  Design(DATE), 2019, Peer-reviewed

  
• High-Speed ASIC Implementation of Paillier Cryptosystem with Homomorphism.

  Chun Cai; Hiromitsu Awano; Makoto Ikeda

  13th IEEE International Conference on ASIC(ASICON), 2019, Peer-reviewed

  
• An ASIC Crypto Processor for 254-Bit Prime-Field Pairing Featuring Programmable Arithmetic Core Optimized for Quadratic Extension Field.

  Hiromitsu Awano; Tadayuki Ichihashi; Makoto Ikeda

  IEICE Transactions, 2019, Peer-reviewed

  
• Ising-PUF: A machine learning attack resistant PUF featuring lattice like arrangement of Arbiter-PUFs.

  Hiromitsu Awano; Takashi Sato

  2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018, 2018, Peer-reviewed

  
• 31.3 μs/Signature-Generation 256-bit 픽p ECDSA Cryptoprocessor.

  Shotaro Sugiyama; Hiromitsu Awano; Makoto Ikeda

  IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018, 2018, Peer-reviewed

  
• An Encryption-Authentication Unified A/D Conversion Scheme for IoT Sensor Nodes.

  Vinod V. Gadde; Hiromitsu Awano; Makoto Ikeda

  IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018, 2018, Peer-reviewed

  
• Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor.

  Shotaro Sugiyama; Hiromitsu Awano; Makoto Ikeda

  IEICE Transactions, 2018, Peer-reviewed

  
• Visualizing Phonotactic Behavior of Female Frogs in Darkness

  Ikkyu Aihara; Phillip J. Bishop; Michel E. B. Ohmer; Hiromitsu Awano; Takeshi Mizumoto; Hiroshi G. Okuno; Peter M. Narins; Jean-Marc Hero

  SCIENTIFIC REPORTS, Sep. 2017, Peer-reviewed

  
• A Swarm of Sound-to-Light Conversion Devices for Monitoring Acoustic Communication among Small Nocturnal Animals

  Takeshi Mizumoto; Ikkyu Aihara; Takuma Otsuka; Hiromitsu Awano; Hiroshi G. kuno

  Journal of Robotics and Mechatronics, Feb. 2017, Peer-reviewed

  
• Yield Enhancement by Repair Circuits for Ultra-Fine Pitch Stacked-Chip Connections.

  Keitaro Koga; Hiromitsu Awano; Makoto Ikeda

  26th IEEE Asian Test Symposium, ATS 2017, Taipei City, Taiwan, November 27-30, 2017, 2017, Peer-reviewed

  
• Efficient circuit failure probability calculation along product lifetime considering device aging.

  Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017, 2017, Peer-reviewed

  
• RTN in Scaled Transistors for On-Chip Random Seed Generation.

  Abinash Mohanty; Ketul B. Sutaria; Hiromitsu Awano; Takashi Sato; Yu Cao 0001

  IEEE Trans. Very Large Scale Integr. Syst., 2017, Peer-reviewed

  
• Scalable Device Array for Statistical Characterization of BTI-Related Parameters.

  Hiromitsu Awano; Shumpei Morita; Takashi Sato

  IEEE Trans. Very Large Scale Integr. Syst., 2017, Peer-reviewed

  
• Swarm of Sound-to-Light Conversion Devices to Monitor Acoustic Communication Among Small Nocturnal Animals.

  Takeshi Mizumoto; Ikkyu Aihara; Takuma Otsuka; Hiromitsu Awano; Hiroshi G. Okuno

  JRM, 2017, Peer-reviewed

  
• Efficient Aging-Aware Failure Probability Estimation Using Augmented Reliability and Subset Simulation.

  Hiromitsu Awano; Takashi Sato

  IEICE Transactions, 2017, Peer-reviewed

  
• Identification and Application of Invariant Critical Paths under NBTI Degradation.

  Song Bian; Shumpei Morita; Michihiro Shintani; Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  IEICE Transactions, 2017, Peer-reviewed

  
• Physically unclonable function using RTN-induced delay fluctuation in ring oscillators

  Motoki Yoshinaga; Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  Proceedings - IEEE International Symposium on Circuits and Systems, 29 Jul. 2016, Peer-reviewed

  
• Physically Unclonable Function Using RTN-Induced Delay Fluctuation in Ring Oscillators

  Motoki Yoshinaga; Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2016, Peer-reviewed

  
• Call Alternation Between Specific Pairs of Male Frogs Revealed by a Sound-Imaging Method in Their Natural Habitat.

  Ikkyu Aihara; Takeshi Mizumoto; Hiromitsu Awano; Hiroshi G. Okuno

  Interspeech 2016, 17th Annual Conference of the International Speech Communication Association, San Francisco, CA, USA, September 8-12, 2016, 2016, Peer-reviewed

  
• Workload-Aware Worst Path Analysis of Processor-Scale NBTI Degradation.

  Song Bian; Michihiro Shintani; Shumpei Morita; Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  Proceedings of the 26th edition on Great Lakes Symposium on VLSI, GLVLSI 2016, Boston, MA, USA, May 18-20, 2016, 2016, Peer-reviewed

  
• Efficient transistor-level timing yield estimation via line sampling.

  Hiromitsu Awano; Takashi Sato

  Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016, 2016, Peer-reviewed

  
• Efficient Aging-Aware SRAM Failure Probability Calculation via Particle Filter-Based Importance Sampling.

  Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  IEICE Transactions, 2016, Peer-reviewed

  
• On-chip characterization of statistical device degradation

  Takashi Sato; Hiromitsu Awano

  Circuit Design for Reliability, 01 Jan. 2015, Peer-reviewed

  
• ECRIPSE: An Efficient Method for Calculating RTN-Induced Failure Probability of an SRAM Cell

  Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2015, Peer-reviewed

  
• Recognition of In-Field Frog Chorusing Using Bayesian Nonparametric Microphone Array Processing.

  Yoshiaki Bando; Takuma Otsuka; Ikkyu Aihara; Hiromitsu Awano; Katsutoshi Itoyama; Kazuyoshi Yoshii; Hiroshi Gitchang Okuno

  Computational Sustainability, Papers from the 2015 AAAI Workshop, Austin, Texas, USA, January 26, 2015., 2015, Peer-reviewed

  
• Automation of Model Parameter Estimation for Random Telegraph Noise

  Hirofumi Shimizu; Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Dec. 2014, Peer-reviewed

  
• BTIarray: A Time-Overlapping Transistor Array for Efficient Statistical Characterization of Bias Temperature Instability

  Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, Sep. 2014, Peer-reviewed

  
• Variability in Device Degradations: Statistical Observation of NBTI for 3996 Transistors

  Hiromitsu Awano; Masayuki Hiromoto; Takashi Sato

  PROCEEDINGS OF THE 2014 44TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2014), 2014, Peer-reviewed

  
• Spatio-Temporal Dynamics in Collective Frog Choruses Examined by Mathematical Modeling and Field Observations

  Ikkyu Aihara; Takeshi Mizumoto; Takuma Otsuka; Hiromitsu Awano; Kohei Nagira; Hiroshi G. Okuno; Kazuyuki Aihara

  SCIENTIFIC REPORTS, Jan. 2014, Peer-reviewed

  
• Compact Modeling of Statistical BTI Under Trapping/detrapping

  J. B. Velamala; K. B. Sutaria; H. Shimizu; H. Awano; T. Sato; G. Wirth; Y. Cao

  IEEE Transactions on Electron Devices, Nov. 2013, Peer-reviewed

  
• Bayesian Estimation of Multi-Trap RTN Parameters Using Markov Chain Monte Carlo Method

  Hiromitsu Awano; Hiroshi Tsutsui; Hiroyuki Ochi; Takashi Sato

  IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Dec. 2012, Peer-reviewed

  
• Estimation of Model Parameters for Random Telegraph Noise Based on Information Criterion

  Hirofumi Shimizu; Hiromitsu Awano; Hiroshi Tsutsui; Hiroyuki Ochi; Takashi Sato

  in Proc. of IPSJ DA Symposium, Aug. 2012, Peer-reviewed

  
• Use of a Sparse Structure to Improve Learning Performance of Recurrent Neural Networks

  Hiromitsu Awano; Shun Nishide; Hiroaki Arie; Jun Tani; Toru Takahashi; Hiroshi G. Okuno; Tetsuya Ogata

  NEURAL INFORMATION PROCESSING, PT III, 2011, Peer-reviewed

  
• Human-Robot Cooperation in Arrangement of Objects Using Confidence Measure of Neuro-dynamical System

  Hiromitsu Awano; Tetsuya Ogata; Shun Nishide; Torn Takahashi; Kazunori Komatani; Hiroshi G. Okuno

  IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC 2010), 2010, Peer-reviewed

  
• EFFECT OF ARGON ION-BOMBARDMENT ON INTERNAL-STRESS IN EVAPORATED CO-CR FILM

  H AWANO; T SATO

  JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, May 1988, Peer-reviewed

  

Misc.

• A-3-5 On Stochastic modeling of NBTI induced threshold voltage variation

  Sato Masahiro; Izuka Syoichi; Awano Hiromitsu; Hashimoto Masanori; Onoye Takao

  Proceedings of the IEICE General Conference, 24 Feb. 2015

  
• A study on parameter estimation for modeling of random-telegraph noise

  粟野 皓光; 清水 裕史; 筒井 弘; 越智 裕之; 佐藤 高史

  研究報告システムLSI設計技術（SLDM）, 21 Nov. 2011

  
• Physical Unclonable Function Using RTN-Induced Time-Dependent Frequency Variance in Ring Oscillators

  YOSHINAGA Motoki; AWANO Hiromitsu; HIROMOTO Masayuki; SATO Takashi

  Technical report of IEICE. VLD, 02 Mar. 2015

  
• An efficient calculation of RTN-induced SRAM failure probability

  粟野 皓光; 廣本 正之; 佐藤 高史

  研究報告システムとLSIの設計技術（SLDM）, 19 Nov. 2014

  
• Worst-Delay Path Extraction in NBTI-Degraded Processors Based on Signal Probability Analysis

  辺 松; 新谷 道広; 森田 俊平; 粟野 皓光; 廣本 正之; 佐藤 高史

  回路とシステムワークショップ論文集 Workshop on Circuits and Systems, 12 May 2016

  
• チャレンジヒステリシス特性を有するPUFの設計とシミュレーションに基づく性能評価

  粟野 皓光; 佐藤 高史

  DA シンポジウム, Aug. 2017, Peer-reviewed

  
• Line samplingを用いたモンテカルロ法に基づくタイミング歩留り解析の高速化

  粟野 皓光; 佐藤 高史

  信学技報 VLSI設計技術研究会, Mar. 2017

  
• Efficient Transistor-level Timing Yield Estimation via Line Sampling

  H. Awano; T. Sato

  ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), Mar. 2016, Peer-reviewed

  
• Fast Monte Carlo based timing yield calculation

  粟野 皓光; 佐藤 高史

  信学技報 VLSI設計技術研究会(デザインガイア), Dec. 2015

  
• Fast Monte Carlo for Timing Yield Estimation via Line Sampling

  H. Awano; T. Sato

  Workshop on variability modeling and characterization (VMC), Nov. 2015

  
• デバイス特性の経年劣化に起因する不良確率変化の効率的な解析手法

  粟野 皓光; 廣本 正之; 佐藤 高史

  DA シンポジウム, Aug. 2015, Peer-reviewed

  
• RTN起因のリングオシレータ発振周波数変動を利用したPUF

  吉永 幹; 粟野 皓光; 廣本 正之; 佐藤 高史

  信学技報 VLSI設計技術研究会, Mar. 2015

  
• RTNを考慮したSRAM不良確率の高速計算

  粟野 皓光; 廣本 正之; 佐藤 高史

  信学技報 VLD研究会(デザインガイア), Nov. 2014

  
• ランダムテレグラフノイズを用いたチップ識別手法の一検討

  吉永 幹; 粟野 皓光; 廣本 正之; 佐藤 高史

  電子情報通信学会 ソサイエティ大会, Sep. 2014

  
• 振動子モデルと音声可視化システムを用いたアマガエルの合唱法則の解析

  合原一究; 粟野皓光; 水本武志; 坂東宜昭; 大塚琢馬; 柳楽浩平; 奥乃博

  人工知能学会AIチャレンジ研究会(Web), 2014

  
• A scalable device array for statistical device-aging characterization

  Takashi Sato; Hiromitsu Awano; Masayuki Hiromoto

  2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2014, Peer-reviewed, Invited

  
• Statistical Observation of NBTI and PBTI Degradations

  H. Awano; M. Hiromoto; T. Sato

  Workshop on variability modeling and characterization (VMC), Nov. 2013

  
• トランジスタアレイを用いたBTI劣化の統計的観測

  粟野 皓光; 佐藤 高史

  DA シンポジウム, Aug. 2013

  
• 3996トランジスタにおけるNBTI劣化の統計的ばらつき

  粟野 皓光; 廣本 正之; 佐藤 高史

  DA シンポジウム, Aug. 2013

  
• Multi-trap RTN Parameter Extraction based on Bayesian Inference

  Hiromitsu Awano; Hiroshi Tsutsui; Hiroyuki Ochi; Takashi Sato

  PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, Peer-reviewed

  
• Logarithmic Modeling of BTI under Dynamic Circuit Operation: Static, Dynamic and Long-term Prediction

  Jyothi B. Velamala; Ketul B. Sutaria; Hirofumi Shimuzu; Hiromitsu Awano; Takashi Sato; Gilson Wirth; Yu Cao

  2013 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2013, Peer-reviewed

  
• Do It Your Self with 3D Printers and Kinect：1. Let's Play with a 3D Printer!

  水本 武志; 粟野 皓光; 坂東宜昭

  情報処理, 15 Jul. 2012

  
• Statistical Observations of NBTI-induced Threshold Voltage Shifts on Small Channel-area Devices

  T. Sato; H. Awano; H. Shimizu; H. Tsutsui; H. Ochi

  International Symposium on Quality Electronic Design (ISQED), Mar. 2012, Peer-reviewed

  
• Statistical Aging under Dynamic Voltage Scaling: A Logarithmic Model Approach

  Jyothi B. Velamala; Ketul Sutaria; Hirofumi Shimizu; Hiromitsu Awano; Takashi Sato; Yu Cao

  2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012, Peer-reviewed

  
• ランダムテレグラフノイズモデル化のためのパラメータ推定法の検討

  粟野皓光; 清水裕史; 筒井 弘; 越智 裕之; 佐藤 高史

  デザインガイア 情報処理学会 SLDM研究会, Nov. 2011

  
• 再帰結合神経回路モデルへのスパース構造導入による学習能力の向上

  粟野皓光; 尾形哲也; 有江浩明; 谷淳; 高橋徹; 奥乃博

  情報処理学会全国大会講演論文集, 02 Mar. 2011

  
• Human and Robot Cooperation for Arrangement of Objects by Prediction using Recurrent Neural Network

  AWANO Hiromitsu; OGATA Tetsuya; TAKAHASHI Toru; KOMATANI Kazunori; OKUNO Hiroshi G

  全国大会講演論文集, 08 Mar. 2010

  
• 確信度を用いた物体配置作業における人間ロボット協調

  粟野皓光; 尾形哲也; 西出俊; 高橋徹; 奥乃博

  日本ロボット学会学術講演会予稿集(CD-ROM), 2010

  

External funds: Kakenhi

• 未来予測技術で切り拓く疑似ゼロレイテンシ・テレイグジスタンス

  Grant-in-Aid for Scientific Research (B)

  Basic Section 60040:Computer system-related

  Kyoto University

  粟野 皓光

  From 01 Apr. 2021, To 31 Mar. 2024, Granted

  テレイグジスタンス;未来予測;エッジコンピューティング;ロボット;協調制御;力触覚ガイダンス;ハードウェアアクセラレータ

  https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-21H03409/
• Development of low power deep learning LSI based on in-memory computing

  Grant-in-Aid for Early-Career Scientists

  Basic Section 21060:Electron device and electronic equipment-related

  Kyoto University;Osaka University

  Hiromitsu Awano

  From 01 Apr. 2018, To 31 Mar. 2021, Project Closed

  リザバーコンピューティング;機械学習;低消費電力;リザーバコンピューティング;画像分類;エッジコンピューティング;ブルームフィルタ;オンライン学習;ゲートレベル時候同期回路;サブスレッショルド動作;深層学習;集積回路;アクセラレータ

  https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-18K13800/

Education

Teaching subject(s)

• From 01 Apr. 2023, To 31 Mar. 2024

  Integraged Circuits Engineering

  6113, Spring, Faculty of Engineering, 2
• From 01 Apr. 2023, To 31 Mar. 2024

  Embedded Computer Systems

  6111, Fall, Faculty of Engineering, 2
• From 01 Apr. 2023, To 31 Mar. 2024

  Introduction to Electronics

  5300, Spring, Faculty of Engineering, 2
• From 01 Apr. 2023, To 31 Mar. 2024

  Integrated System Architecture and Synthesis

  3677, Spring, Graduate School of Informatics, 2
• From 01 Apr. 2023, To 31 Mar. 2024

  System-Level Design Methodology for SoCs

  3635, Fall, Graduate School of Informatics, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  System-Level Design Methodology for SoCs

  3635, Fall, Graduate School of Informatics, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  Digital Circuits

  6060, Spring, Faculty of Engineering, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  Integrated System Architecture and Synthesis

  3677, Spring, Graduate School of Informatics, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  Integraged Circuits Engineering

  6113, Spring, Faculty of Engineering, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  Introduction to Electronics

  5300, Spring, Faculty of Engineering, 2
• From 01 Apr. 2022, To 31 Mar. 2023

  Embedded Computer Systems

  6111, Fall, Faculty of Engineering, 2
• From Apr. 2021, To Mar. 2022

  Introduction to Electronics

  Spring, 工学部
• From Apr. 2021, To Mar. 2022

  Digital Circuits

  Spring, 工学部
• From Apr. 2021, To Mar. 2022

  Integrated System Architecture and Synthesis

  Spring, 情報学研究科
• From Apr. 2021, To Mar. 2022

  Embedded Computer Systems

  Fall, 工学部
• From Apr. 2021, To Mar. 2022

  Integraged Circuits Engineering

  Spring, 工学部
• From Apr. 2021, To Mar. 2022

  System-Level Design Methodology for SoCs

  Fall, 情報学研究科

Administration

Faculty management (title, position)

• From 01 Apr. 2023, To 31 Mar. 2024

  WebサイトWG委員

Academic, Social Contribution

Committee Memberships

• From Jun. 2018, To Present

  集積回路研究専門委員会, 電子情報通信学会
• From Apr. 2018, To Present

  システムとLSIの設計技術研究運営委員会, 情報処理学会
• From Apr. 2018, To Present

  ハードウェアセキュリティ研究専門委員会, 電子情報通信学会